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dsPICDEM? MCSM
DEVELOPMENT BOARD
USER ’S GUIDE
Chapter 3. Hardware
This chapter describes the hardware used in the dsPICDEM MCSM Development
Board. Topics covered include:
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Hardware Architecture
PIM Configuration
Board Connectors
User Interface Hardware
3.1
HARDWARE ARCHITECTURE
The dsPIC DSC devices feature an 8-channel, high-speed PWM with Complementary
mode output, a programmable ADC trigger on the PWM reload cycle, digital dead time
control, internal shoot-through protection and hardware fault shutdown.
These features make the dsPIC DSC an ideal solution for high-performance stepper
motor control applications where full control of the full-bridge inverter is required.
Figure 3-1 provides a simplified block diagram of the development board hardware.
FIGURE 3-1:
dsPICDEM MCSM DEVELOPMENT BOARD BLOCK DIAGRAM
J 6
24 VDC
BP1
J5
Regulator
3.3V
Regulator
15V
BP2
J7
DC_BUS
3.3V
PWM1H1
POT
PWM1L1
PWM1H2
J8
S1
PWM1L2
PWM1H3
PWM1L3
PWM2H1
PWM2L1
Drivers
M 1
M 2
M 3
M 4
M1
M2
M3
M
DC_BUS
dsPIC33FJXXXMCXXX
PIM
IMOTOR1
M4
Amplifier
J1/J2
IMOTOR2
ICD2
Amplifier
J4
USB
UART
to
USB
FAULT
Comparator
Safe Current
Level
? 2009 Microchip Technology Inc.
DS70610A-page 17
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